EP2S15F672C3 vs EP2S15F672C5N Comparison
Detailed side-by-side comparison of EP2S15F672C3 by Intel and EP2S15F672C5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2S15F672C3 | EP2S15F672C5N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $142.30 | $121.90 |
| Family | Stratix II | Stratix II |
| Logic Elements | 15,600 | 15,600 |
| Embedded Memory (bits) | 419,328 | 419,328 |
| DSP Blocks (18-bit multipliers) | 156 | β |
| Maximum User I/O | 366 | β |
| Core Voltage | 1.2 V | β |
| Process Technology | 90 nm CMOS | β |
| Maximum Internal Frequency | [DATA_NEEDED: max internal clock MHz] | 640 MHz |
| Package | 672-ball FC-FBGA | 672-BBGA / FBGA-672 |
| Mounting Type | Surface Mount | β |
| Operating Temperature Grade | Commercial (C3 suffix) | β |
| Speed Grade | C3 (third commercial speed bin) | -C5 |
| PLLs | [DATA_NEEDED: number of PLLs] | β |
| Global Clock Networks | [DATA_NEEDED: number of global clocks] | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | RoHS Compliant |
| MSL Level | [DATA_NEEDED: moisture sensitivity level] | β |
| Series | β | Altera Stratix II |
| Logic Array Blocks (LABs) | β | 780 |
| Configurable Logic Blocks (CLBs) | β | 6,240 |
| User I/O Pins | β | 366 |
| Package Dimensions | β | 35 x 35 mm |
| Ball Pitch | β | 1.0 mm |
| Operating Temperature | β | 0C to +85C (commercial) |
| Lead-Free (Pb-Free) | β | Yes |