EP2S15F672C5N vs EP2S15F672C4 Comparison
Detailed side-by-side comparison of EP2S15F672C5N by Intel and EP2S15F672C4 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2S15F672C5N | EP2S15F672C4 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $121.90 | $235.00 |
| Family | Stratix II | Stratix II |
| Series | Altera Stratix II | β |
| Logic Elements | 15,600 | 15,600 |
| Logic Array Blocks (LABs) | 780 | β |
| Configurable Logic Blocks (CLBs) | 6,240 | β |
| Embedded Memory (bits) | 419,328 | β |
| User I/O Pins | 366 | β |
| Package | 672-BBGA / FBGA-672 | 672-ball FineLine BGA (FBGA) |
| Package Dimensions | 35 x 35 mm | β |
| Ball Pitch | 1.0 mm | β |
| Maximum Internal Frequency | 640 MHz | β |
| Operating Temperature | 0C to +85C (commercial) | Commercial (0C to +85C, 'C' suffix) |
| Speed Grade | -C5 | 4 |
| Lead-Free (Pb-Free) | Yes | β |
| RoHS Status | RoHS Compliant | [DATA_NEEDED: RoHS compliance per Altera product page] |
| Embedded Memory Bits | β | 419,328 bits |
| DSP Blocks | β | 156 (approximate, per Stratix II family) |
| Maximum User I/Os | β | 366 |
| Process Node | β | 90 nm |
| PLLs | β | 6 |
| Configuration Method | β | Serial / Parallel (passive serial, fast passive parallel, JTAG) |
| I/O Standards Supported | β | LVTTL, LVCMOS, LVDS, SSTL, HSTL (per Stratix II family) |
| Lead-Free | β | [DATA_NEEDED: lead-free finish status] |
| MSL Level | β | [DATA_NEEDED: MSL moisture sensitivity level] |