EP2S30F672C4 vs EP2S30F672I4 Comparison
Detailed side-by-side comparison of EP2S30F672C4 by Intel and EP2S30F672I4 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2S30F672C4 | EP2S30F672I4 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $498.43 | $695.00 |
| Manufacturer | Intel (formerly Altera) | Intel (formerly Altera) |
| Series | Stratix II | Stratix II |
| Logic Elements / Cells | 33,880 | β |
| Total RAM Bits | 1,369,728 | 1369728 |
| Number of I/O | 500 | 500 |
| Package | 672-BBGA, FCBGA (27x27 mm) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Core Voltage - Supply | 1.15 V to 1.25 V | β |
| Process Technology | 90 nm | 90 nm CMOS |
| Maximum Core Frequency (datasheet benchmark) | 711 MHz | β |
| Operating Temperature | 0C to +85C (commercial, 'C' speed grade) | -40C to +100C (Industrial) |
| Embedded DSP Blocks | 16 (Stratix II S30 tier) | β |
| Number of PLLs | [DATA_NEEDED: PLL count for S30 tier] | 6 |
| Number of Global Clock Networks | [DATA_NEEDED: global clock network count] | β |
| RoHS Status | Compliant | [DATA_NEEDED: confirm RoHS compliance on part label] |
| Lead-Free | Yes | β |
| Logic Elements | β | 33880 |
| Logic Array Blocks (LABs) | β | 1694 |
| DSP Blocks | β | 12 (per datasheet, family range) |
| Voltage - Supply | β | 1.2 V core, separate I/O bank VCCIO |
| Package / Case | β | 672-BBGA, FCBGA (FBGA-672) |
| Package Dimensions | β | 35 x 35 mm |
| Ball Pitch | β | 1.0 mm |
| Configuration | β | JTAG, serial, parallel (Stratix II scheme) |
| MSL Level | β | 3 (per JEDEC J-STD-020) |