EP2S30F672I4 vs EP2S30F672I5 Comparison
Detailed side-by-side comparison of EP2S30F672I4 by Intel and EP2S30F672I5 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2S30F672I4 | EP2S30F672I5 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $695.00 | $185.00 |
| Series | Stratix II | β |
| Manufacturer | Intel (formerly Altera) | β |
| Logic Elements | 33880 | β |
| Logic Array Blocks (LABs) | 1694 | β |
| Total RAM Bits | 1369728 | 1,368,576 (1.36 Mbit) |
| Number of I/O | 500 | β |
| DSP Blocks | 12 (per datasheet, family range) | 16 (9-bit x 9-bit multipliers) |
| Number of PLLs | 6 | β |
| Voltage - Supply | 1.2 V core, separate I/O bank VCCIO | β |
| Operating Temperature | -40C to +100C (Industrial) | -40C to +100C (Industrial) |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Package / Case | 672-BBGA, FCBGA (FBGA-672) | β |
| Package Dimensions | 35 x 35 mm | β |
| Ball Pitch | 1.0 mm | 1.00 mm |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Configuration | JTAG, serial, parallel (Stratix II scheme) | β |
| MSL Level | 3 (per JEDEC J-STD-020) | [DATA_NEEDED: MSL rating] |
| RoHS Status | [DATA_NEEDED: confirm RoHS compliance on part label] | Compliant |
| Family | β | Stratix II |
| Logic Elements (LE) | β | 33,880 |
| Adaptive Logic Modules (ALM) | β | 13,567 (approx., per Stratix II family ratio) |
| Maximum User I/Os | β | 500 (492 outputs reported) |
| Maximum Operating Frequency | β | 609.76 MHz |
| Core Supply Voltage | β | 1.2 V |
| I/O Supply Voltage | β | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) |
| Package | β | 672-ball FC-FBGA (FineLine BGA) |
| Lead-Free | β | Yes |
| Speed Grade | β | 5 (fast) |