EP2S60F1020I4 vs EP2S130F1020I4 Comparison

Detailed side-by-side comparison of EP2S60F1020I4 by Altera and EP2S130F1020I4 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP2S60F1020I4 EP2S130F1020I4
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $1,454.92 $1,395.00
Manufacturer Intel / Altera β€”
Series Stratix II β€”
Logic Elements (LEs) 60,440 β€”
Embedded Memory (bits) 2,544,192 6,747,840
Number of LABs/CLBs 3022 β€”
Number of CLBs 24176 β€”
Maximum User I/O 718 β€”
Number of I/O Banks [DATA_NEEDED: number of I/O banks] β€”
Operating Voltage (Core) 1.2 V β€”
Process Technology 90 nm CMOS β€”
Temperature Grade Industrial (-40C to +100C TJ) β€”
Package Type 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA) β€”
Package Dimensions 33 mm x 33 mm β€”
Ball Pitch 1.0 mm β€”
Mounting Type Surface Mount Surface Mount (FC-FBGA)
Configuration Method Passive Serial / Fast Passive Parallel / JTAG β€”
Number of PLLs 12 β€”
Global Clock Networks 16 β€”
Embedded Multipliers (18x18) 36 β€”
Transceiver Count 0 (no embedded transceivers) β€”
Maximum Embedded Memory Bandwidth [DATA_NEEDED: memory bandwidth spec] β€”
RoHS Status Non-compliant (contains lead per legacy Altera package) Compliant (per distributor listings)
Family β€” Stratix II
Logic Elements β€” 132,540
Equivalent LEs β€” ~180,000
Adaptive Logic Modules (ALMs) β€” 53,016
Embedded Memory (M512 blocks) β€” 530
Embedded Memory (M4K blocks) β€” 768
Embedded Memory (M-RAM blocks) β€” 4
Embedded 18x18 Multipliers β€” 504
DSP Blocks β€” 48
User I/O Pins β€” 742
User I/O Banks β€” 12
Package β€” 1020-ball FC-FBGA (33x33 mm)
Process Node β€” 90 nm CMOS, all-layer copper
Core Voltage (VCCINT) β€” 1.2 V
Speed Grade β€” I (industrial performance)
Device Revision β€” 4
Operating Junction Temperature β€” -40C to +100C (industrial)
Configuration Scheme β€” Fast Passive Parallel x8, Passive Serial, JTAG

Datasheets & Resources

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