EP2S60F484I5N vs EP2S60F484C3N Comparison

Detailed side-by-side comparison of EP2S60F484I5N by Altera and EP2S60F484C3N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP2S60F484I5N EP2S60F484C3N
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $1,325.00 $1,245.75
Series Stratix II (EP2S60) β€”
Family Field Programmable Gate Array (FPGA) Stratix II
Logic Elements (LE) 60,440 β€”
Adaptive Logic Modules (ALM) 24,176 β€”
Embedded Memory (bits) 2,544,192 β€”
Embedded Memory (M512/M4K/M-RAM blocks) M512: 330, M4K: 255, M-RAM: 2 β€”
DSP Blocks (18-bit multipliers) 48 blocks (192 18x18 multipliers) β€”
PLLs 12 (4 enhanced + 8 fast) β€”
Maximum User I/O Pins 334 334
Maximum Fabric Clock 609.76 MHz β€”
Core Supply Voltage 1.2 V typical β€”
Process Technology 90 nm CMOS 90 nm CMOS, 1.2 V core
Package 484-ball FC-FBGA (Flip-Chip Fine-pitch BGA), 1.00 mm pitch 484-BGA (F484), 1.0 mm pitch
Speed Grade I5 (industrial, slow-speed for low power) -3 (fastest commercial)
Operating Temperature Range -40 Β°C to +100 Β°C (industrial) β€”
Mounting Type Surface Mount (BGA) β€”
RoHS Status [DATA_NEEDED: rohs status not stated in verified data] Compliant
Lead-Free / Halogen-Free [DATA_NEEDED: lead-free / halogen-free status] β€”
Configuration Interface JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel β€”
Design Tool Quartus II (legacy; current Intel Quartus Prime with Stratix II device support) β€”
Logic Elements β€” 60,440
Adaptive LUTs (ALUTs) β€” 48,352
Embedded Memory (TriMatrix) β€” 2,544 Kbits (M4K + M512 + M-RAM)
Embedded DSP Blocks β€” 12 (48 GMACs at 450 MHz)
Operating Temperature (Commercial) β€” 0C to +85C (TJ)
Supply Voltage VCCINT β€” 1.2 V nominal
Configuration Modes β€” FPP, AS, PS, JTAG
MSL Level β€” 3 (per JEDEC J-STD-020)
Lead-Free β€” Yes

Datasheets & Resources

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