EP2S60F484I5N vs EP2S60F484C5N Comparison
Detailed side-by-side comparison of EP2S60F484I5N by Altera and EP2S60F484C5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2S60F484I5N | EP2S60F484C5N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1,325.00 | $720.50 |
| Series | Stratix II (EP2S60) | β |
| Family | Field Programmable Gate Array (FPGA) | Stratix II |
| Logic Elements (LE) | 60,440 | β |
| Adaptive Logic Modules (ALM) | 24,176 | β |
| Embedded Memory (bits) | 2,544,192 | β |
| Embedded Memory (M512/M4K/M-RAM blocks) | M512: 330, M4K: 255, M-RAM: 2 | β |
| DSP Blocks (18-bit multipliers) | 48 blocks (192 18x18 multipliers) | β |
| PLLs | 12 (4 enhanced + 8 fast) | 12 (enhanced + fast) |
| Maximum User I/O Pins | 334 | β |
| Maximum Fabric Clock | 609.76 MHz | β |
| Core Supply Voltage | 1.2 V typical | β |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Package | 484-ball FC-FBGA (Flip-Chip Fine-pitch BGA), 1.00 mm pitch | 484-ball FBGA (FineLine BGA) |
| Speed Grade | I5 (industrial, slow-speed for low power) | C5 (slowest) |
| Operating Temperature Range | -40 Β°C to +100 Β°C (industrial) | β |
| Mounting Type | Surface Mount (BGA) | β |
| RoHS Status | [DATA_NEEDED: rohs status not stated in verified data] | Compliant (lead-free) |
| Lead-Free / Halogen-Free | [DATA_NEEDED: lead-free / halogen-free status] | β |
| Configuration Interface | JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel | β |
| Design Tool | Quartus II (legacy; current Intel Quartus Prime with Stratix II device support) | β |
| Logic Elements | β | 60,440 |
| Adaptive Logic Modules (ALMs) | β | 24,176 |
| Embedded Memory Bits | β | 2,544,192 bits |
| Embedded RAM Blocks (TriMatrix) | β | Yes |
| DSP Blocks | β | 36 |
| 18x18 Multipliers | β | Up to 144 (max for family: 384) |
| Maximum User I/O | β | 334 |
| Transceiver Blocks | β | 12 (up to 6.375 Gbps) |
| Core Voltage | β | 1.2 V |
| I/O Standards | β | LVTTL, LVCMOS, LVDS, LVPECL, PCI, PCI-X |
| Temperature Grade | β | Commercial (0C to +85C junction) |
| Configuration Scheme | β | SRAM-based, volatile (requires EPC16/EPC64 or JTAG) |