EP2SGX130GF40C5ES vs EP2SGX130GF40C4NES Comparison
Detailed side-by-side comparison of EP2SGX130GF40C5ES by Altera and EP2SGX130GF40C4NES by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP2SGX130GF40C5ES - Stratix II GX 132K LC FPGA, FC-FBGA-1508 | Altera
EP2SGX130GF40C5ES β Last Time BuyIntel
EP2SGX130GF40C4NES - 132K LE Stratix II GX FPGA, 6.375Gbps SERDES, 1508-FBGA | Intel
EP2SGX130GF40C4NES β Last Time BuySpecification Comparison
| Parameter | EP2SGX130GF40C5ES | EP2SGX130GF40C4NES |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1,380.00 | $1,380.00 |
| Family | Stratix II GX | Stratix II GX |
| Logic Elements | 132,540 | 132,540 |
| Logic Array Blocks (LABs) | 7,047 | β |
| Internal Frequency (max) | 609.76 MHz | β |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Supply Voltage (nominal) | 1.2 V | β |
| Speed Grade | C5 (mid-upper) | C4 (speed grade -4) |
| Operating Temperature | 0C to +85C (Commercial Extended) | Commercial Extended (per N suffix) |
| Package | FC-FBGA-1508 (40 x 40 mm, 1 mm pitch) | β |
| Ball Count | 1508 | β |
| Package Type | Flip-Chip Fine-pitch BGA | β |
| Mounting Type | Surface Mount | Surface Mount (flip-chip BGA) |
| Lead-Free / Halogen-Free | Yes (G suffix) | β |
| RoHS Status | Compliant | β |
| Configuration Interface | JTAG / Passive Serial / Active Serial | β |
| Logic Blocks / ALMs | β | Approximately 53,000 ALMs |
| Core Voltage | β | 1.2 V |
| Maximum Transceiver Data Rate | β | 6.375 Gbps |
| Transceiver Channels | β | Up to 20 (4 to 20, device-dependent) |
| User I/O Pins | β | 734 |
| Total Package Pins | β | 1508 (FC-FBGA ball grid) |
| Package Code | β | GF40 (FC-FBGA, 40x40 mm, 1.0 mm pitch) |
| Internal Operating Frequency | β | Up to 717 MHz |
| Embedded Memory | β | Approximately 4.5 Mbits (TriMatrix) |
| PLL Blocks | β | 8 |
| DSP Blocks | β | Yes (variable, see datasheet) |
| Lead-Free / RoHS | β | Yes (LEAD FREE per datasheet family code) |
| MSL Level | β | Per JEDEC J-STD-020, typically MSL-4 or higher [DATA_NEEDED: exact MSL level] |
| JEDEC Standard Reference | β | MS-034AAU-1 |