EP2SGX30DF780C5N vs EP2SGX30DF780I4 Comparison

Detailed side-by-side comparison of EP2SGX30DF780C5N by Intel and EP2SGX30DF780I4 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EP2SGX30DF780C5N EP2SGX30DF780C5N - Stratix II GX FPGA, 33.88k LE, 780-FBGA | Intel

EP2SGX30DF780C5N - Stratix II GX FPGA, 33.88k LE, 780-FBGA | Intel

EP2SGX30DF780C5N โš  Last Time Buy
Intel
EP2SGX30DF780I4 EP2SGX30DF780I4 - 33,880 Logic Cells Stratix II GX FPGA | Intel

EP2SGX30DF780I4 - 33,880 Logic Cells Stratix II GX FPGA | Intel

EP2SGX30DF780I4 โš  Last Time Buy

Specification Comparison

Parameter EP2SGX30DF780C5N EP2SGX30DF780I4
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $1,050.00 $178.25
Series Stratixยฎ II GX Stratix II GX
Family Name Stratix II GX โ€”
Logic Elements / Cells 33,880 33,880
LABs / CLBs 1,694 โ€”
Total RAM Bits 1,369,728 1,369,728
User I/O Count 361 361
Package Type FC-FBGA-780 โ€”
Package Size 29 mm x 29 mm โ€”
Ball Pitch 1.0 mm โ€”
Operating Temperature -40ยฐC to +85ยฐC (extended commercial) -40C to +85C (Industrial)
Core Voltage 1.2 V โ€”
Internal Frequency (max) 622 MHz โ€”
Process Technology 90 nm CMOS 90 nm CMOS
RoHS Status Compliant (lead-free finish) [DATA_NEEDED: RoHS status]
Mounting Type Surface Mount Surface Mount (Flip-chip BGA)
MSL Level [DATA_NEEDED: MSL level] [DATA_NEEDED: MSL level]
Speed Grade C5 โ€”
Design Tool Quartus II โ€”
Family โ€” Stratix II GX
Number of LABs โ€” 1,694
Number of I/O Banks โ€” [DATA_NEEDED: number of I/O banks]
Nominal Supply Voltage (Core) โ€” 1.2 V
Internal Operating Frequency โ€” 622 MHz
Maximum Clock Frequency โ€” 717 MHz
Package โ€” 780-ball FC-FBGA, 29x29 mm, 1 mm pitch
Lead-Free โ€” [DATA_NEEDED: lead-free status]
Number of Transceivers โ€” [DATA_NEEDED: number of transceiver channels]
Number of PLLs / DLLs โ€” [DATA_NEEDED: number of PLLs]

Datasheets & Resources

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