EP2SGX60CF780C5N vs EP2SGX60CF780C5 Comparison
Detailed side-by-side comparison of EP2SGX60CF780C5N by Intel and EP2SGX60CF780C5 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP2SGX60CF780C5N - Stratix II GX FPGA, 60K LE, 6.375 Gbps SERDES | Intel
EP2SGX60CF780C5N β Last Time BuySpecification Comparison
| Parameter | EP2SGX60CF780C5N | EP2SGX60CF780C5 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $485.00 | $162.00 |
| Series | Stratix II GX | β |
| Logic Elements | 60,440 (60K LE) | 60,440 |
| Logic Array Blocks (LABs) | 3022 | 3,022 |
| Total RAM Bits | 2,544,192 (approximately 2.5 Mbit) | β |
| User I/Os | 364 | β |
| High-Speed Transceiver Channels | 20 (up to 6.375 Gbps per channel) | β |
| Core Voltage | 1.15 V to 1.25 V | 1.2 V |
| Internal Frequency (max) | 717 MHz | β |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Package | 780-BBGA, FCBGA (29 mm x 29 mm, 1.0 mm pitch) | 780-ball FC-FBGA (29x29 mm, 1 mm pitch) |
| Mounting Type | Surface Mount | Surface Mount |
| Configuration Interface | JTAG (IEEE 1149.1), passive/active serial | β |
| RoHS Status | Compliant | Compliant |
| Operating Temperature Grade | Commercial (C) | β |
| Transceiver Data Rate | Up to 6.375 Gbps | β |
| Device Family | β | Stratix II GX |
| Embedded Memory Bits | β | 2,544,192 bits |
| Maximum User I/Os | β | 364 |
| Number of Pins | β | 780 |
| Maximum Internal Frequency | β | 717 MHz |
| Propagation Delay | β | [DATA_NEEDED: propagation delay in ns] |
| Speed Grade | β | C5 (commercial) |
| Temperature Grade | β | Commercial (0C to +85C) |
| Transceivers | β | Up to 20 multi-gigabit transceivers |
| DSP Blocks | β | Yes (TriMatrix embedded multiplier blocks) |
| PLLs | β | 4 enhanced PLLs + 8 fast PLLs |
| Configuration Schemes | β | Passive Serial, Fast Passive Parallel, JTAG |
| Memory Interfaces | β | DDR/DDR2 SDRAM controllers with source-synchronous PHY |
| Lead-Free | β | Yes |
| MSL Level | β | [DATA_NEEDED: MSL rating] |