EP2SGX60EF1152I3 vs EP2SGX60EF1152I4N Comparison

Detailed side-by-side comparison of EP2SGX60EF1152I3 by Intel and EP2SGX60EF1152I4N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EP2SGX60EF1152I4N EP2SGX60EF1152I4N - 60,440-LCell FPGA, 717 MHz | Intel

EP2SGX60EF1152I4N - 60,440-LCell FPGA, 717 MHz | Intel

EP2SGX60EF1152I4N βœ“ Active

Specification Comparison

Parameter EP2SGX60EF1152I3 EP2SGX60EF1152I4N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Active
Stock Status In Stock In Stock
Unit Price (USD) $365.00 $0.00
Family Stratix II GX β€”
Series EP2SGX60 β€”
Logic Elements (LEs) 60,440 β€”
Adaptive Logic Modules (ALMs) 30,220 (estimated from LEs) β€”
Equivalent Logic Cells (CLBs) 60,440 β€”
Embedded Memory (Bits) 2,544,192 bits (per DigiKey listing for the I4N variant) β€”
Maximum Internal Frequency 717 MHz β€”
Combinational Delay (per CLB) 2.99 ns β€”
Multi-Gigabit Transceivers [DATA_NEEDED: exact count for EP2SGX60] β€”
Maximum Transceiver Data Rate 6.375 Gbps (per Stratix II GX family spec) β€”
Total RAM Bits 2,544,192 bits β€”
Package 1152-ball FBGA, 35 mm x 35 mm, 1 mm pitch 1,152-ball FBGA
Pin/Ball Count 1152 β€”
Mounting Type Surface Mount (BGA) Surface mount
Operating Temperature -40C to +100C (Industrial, I3 speed grade) β€”
Speed Grade I3 (Industrial) β€”
Configuration Mode Enhanced (EPC) - fast parallel via external memory β€”
Process Technology 90 nm CMOS β€”
RoHS Status [DATA_NEEDED: not in retrieved snippets] β€”
Device Type β€” FPGA
Product Family β€” Stratix II GX
Logic Cells β€” 60,440
Embedded Memory β€” 2,544,192 bits
I/O Count β€” 534
Internal Frequency β€” 717 MHz
Supply Voltage β€” 1.2 V
Package Type β€” Other, 23 x 23 mm, 1 mm pitch, MS-034AAJ-1, FBGA-484
Pins β€” 484
Device Technology β€” 90 nm
Logic Blocks β€” 3,022 LABs
Operating Temperature Grade β€” Industrial
Compliance β€” [DATA_NEEDED: compliance certification details]
Transceiver Count β€” [DATA_NEEDED: high-speed transceiver count]
Configuration Memory β€” [DATA_NEEDED: configuration memory specification]
Package Pinout β€” [DATA_NEEDED: complete ball-map pinout]

Datasheets & Resources

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