EP2SGX60EF1152I5 vs EP2SGX60EF1152I4N Comparison
Detailed side-by-side comparison of EP2SGX60EF1152I5 by Intel and EP2SGX60EF1152I4N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2SGX60EF1152I5 | EP2SGX60EF1152I4N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $178.00 | $0.00 |
| Family | Stratix II GX | β |
| Logic Elements (LEs) | 60,440 | β |
| Configurable Logic Blocks (CLBs) | 60,440 | β |
| Embedded Memory (bits) | 2,544,192 | β |
| Maximum Clock Frequency | 622.08 MHz | β |
| Process Technology | 90 nm CMOS | β |
| Core Supply Voltage | 1.15 V to 1.25 V | β |
| Operating Temperature Grade | Industrial (-40 Β°C to +85 Β°C) | Industrial |
| Package | 1152-ball FC-FBGA (PBGA1152), 35 x 35 mm, 1.00 mm pitch | 1,152-ball FBGA |
| Mounting Type | Surface Mount (flip-chip BGA) | Surface mount |
| Terminal Form | Ball | β |
| Number of Terminals | 1152 | β |
| Package Code | BGA | β |
| MSL Level | [DATA_NEEDED: MSL rating] | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | β |
| Transceivers | Integrated multi-gigabit transceivers (per Stratix II GX family) | β |
| DSP Blocks | Yes, hardware multipliers and DSP blocks (per Stratix II GX family) | β |
| Device Type | β | FPGA |
| Product Family | β | Stratix II GX |
| Logic Cells | β | 60,440 |
| Embedded Memory | β | 2,544,192 bits |
| I/O Count | β | 534 |
| Internal Frequency | β | 717 MHz |
| Supply Voltage | β | 1.2 V |
| Package Type | β | Other, 23 x 23 mm, 1 mm pitch, MS-034AAJ-1, FBGA-484 |
| Pins | β | 484 |
| Device Technology | β | 90 nm |
| Logic Blocks | β | 3,022 LABs |
| Compliance | β | [DATA_NEEDED: compliance certification details] |
| Transceiver Count | β | [DATA_NEEDED: high-speed transceiver count] |
| Configuration Memory | β | [DATA_NEEDED: configuration memory specification] |
| Package Pinout | β | [DATA_NEEDED: complete ball-map pinout] |