EP3SE260F1152C4 vs EP3SL340F1760C4 Comparison
Detailed side-by-side comparison of EP3SE260F1152C4 by Intel and EP3SL340F1760C4 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP3SL340F1760C4 - Stratix III L FPGA 337.5K LE | Intel | 1760-BGA
EP3SL340F1760C4 β Last Time BuySpecification Comparison
| Parameter | EP3SE260F1152C4 | EP3SL340F1760C4 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $8,900.00 | $9,750.00 |
| Series | Stratix III E (Enhanced) | Stratix III L |
| Family | Stratix III | β |
| Logic Elements (LE) | 255,000 | β |
| Logic Array Blocks (LABs) | 10,200 | β |
| Embedded Memory Bits | 16,672,768 | 18,821,144 |
| User I/O Count | 744 | 1,120 |
| Process Technology | 65 nm CMOS (TSMC) | β |
| Core Voltage | 1.1 V | 1.1 V |
| Speed Grade | C4 (slowest commercial grade) | C4 (commercial) |
| Maximum Internal Frequency | ~450 MHz (per FPGAkey listing) | β |
| Package | 1152-pin FC-FBGA (Flip-Chip Fine-pitch BGA) | 1760-BBGA, FCBGA (Flip-Chip) |
| Package Code | BGA, square | β |
| I/O Standards Supported | LVDS, LVTTL, LVCMOS, SSTL, HSTL | LVDS, LVTTL, LVCMOS, HSTL, SSTL, PCI, PCI-X |
| Configuration Modes | Passive Serial, Fast Passive Parallel, JTAG | β |
| DSP Blocks (18x18 Multipliers) | 384 | β |
| PLL Count | [DATA_NEEDED: PLL count] | β |
| Transceivers | External PHY interface only (no integrated GXB) | [DATA_NEEDED: number of embedded transceiver channels] |
| RoHS Status | Compliant (per distributor listings) | Compliant |
| Operating Temperature | Commercial (0C to +85C) - inferred from speed grade C4 | 0C to +85C (commercial) |
| Mounting Type | Surface Mount (BGA) | Surface Mount (BGA) |
| Logic Elements | β | 337,500 |
| Process Node | β | 65 nm |
| Maximum Core Frequency | β | 450 MHz |
| DSP Blocks | β | [DATA_NEEDED: DSP block count] |
| PLLs | β | [DATA_NEEDED: PLL count] |
| Configuration Scheme | β | Passive serial, fast passive parallel, JTAG |
| Lead-Free | β | Yes |