EP3SE260F1517I4N vs EP3SE260H780C3N Comparison
Detailed side-by-side comparison of EP3SE260F1517I4N by Intel and EP3SE260H780C3N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP3SE260F1517I4N - Stratix III E FPGA, 255K LE, 1517-BGA | Intel
EP3SE260F1517I4N โ Last Time BuyIntel
EP3SE260H780C3N - Stratix III E FPGA, 255K LE, 780-BGA | Intel / Altera
EP3SE260H780C3N โ ActiveSpecification Comparison
| Parameter | EP3SE260F1517I4N | EP3SE260H780C3N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10,500.00 | $1,325.00 |
| Series | Stratix III E | Stratixยฎ III E |
| Logic Elements | 255,000 | โ |
| Embedded Memory Bits | 16,672,768 bits | โ |
| Embedded Memory (M9K/M144K blocks) | [DATA_NEEDED: total Kbits and block count] | โ |
| User I/O Pins | 976 | โ |
| Transceivers | [DATA_NEEDED: number of full-duplex channels] | [DATA_NEEDED: number of embedded transceivers and max data rate] |
| Transceiver Data Rate | 600 Mbps to 6.375 Gbps | โ |
| DSP Blocks | [DATA_NEEDED: number of 18x18 multipliers] | [DATA_NEEDED: number of DSP blocks and precision] |
| PLLs | [DATA_NEEDED: total PLL count] | โ |
| Core Voltage | 1.1 V | โ |
| Process Technology | TSMC 65 nm | 40 nm CMOS |
| Package | 1517-BBGA, FCBGA | 780-BBGA, FCBGA (H780) |
| Package Body Size | [DATA_NEEDED: mm x mm] | โ |
| Operating Temperature | -40 ยฐC to +100 ยฐC (Industrial) | 0 ยฐC to +85 ยฐC (C grade, commercial) |
| Operating Temperature Grade | Industrial (I4) | โ |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| Lead-Free / RoHS | [DATA_NEEDED: explicit RoHS statement] | โ |
| MSL Level | [DATA_NEEDED: MSL classification] | โ |
| Logic Elements (LE) | โ | 255,000 |
| Embedded Memory (bits) | โ | 16,672,768 |
| Number of LABs/CLBs | โ | 10,200 |
| User I/Os | โ | 488 |
| Number of Pins / Balls | โ | 780 |
| Maximum Core Frequency | โ | [DATA_NEEDED: maximum core frequency MHz] |
| Supply Voltage (VCCINT) | โ | [DATA_NEEDED: VCCINT nominal V] |
| RoHS Status | โ | Compliant (lead-free 'N' suffix) |
| Moisture Sensitivity Level (MSL) | โ | [DATA_NEEDED: MSL level per JEDEC J-STD-020] |
| Configuration Method | โ | SRAM-based, configured via JTAG / passive / active serial / fast passive parallel |
| Design Toolchain | โ | Altera Quartus II (legacy); Intel Quartus Prime |