EP3SE260H780C4LG vs EP3SE260F1517C4L Comparison
Detailed side-by-side comparison of EP3SE260H780C4LG by Altera and EP3SE260F1517C4L by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP3SE260H780C4LG - Stratix III E FPGA, 488 I/O, 780-HBGA | Altera
EP3SE260H780C4LG β Active
Specification Comparison
| Parameter | EP3SE260H780C4LG | EP3SE260F1517C4L |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1,290.00 | $15,100.00 |
| Family | Stratix III Enhanced (EP3SE) | Stratix III E |
| Logic Elements | 254,400 | 255,000 |
| Adaptive Logic Modules (ALMs) | 101,760 | β |
| Embedded Memory (M9K + M144K) | 18.36 Mbits | β |
| DSP Blocks (18-bit x 18-bit) | 768 | β |
| 18-bit x 18-bit Multipliers | 1,536 | β |
| Transceivers (full-duplex) | 8 (up to 6.375 Gbps) | β |
| Maximum User I/O Pins | 488 | β |
| Package | 780-ball FineLine BGA (HBGA, 29 mm x 29 mm, 1.0 mm pitch) | 1517-BBGA, FCBGA (FineLine BGA) |
| Speed Grade | C4 (commercial, mid-speed tier) | β |
| Temperature Grade | Commercial (0C to +85C junction) | β |
| Process Technology | 65 nm TSMC low-power CMOS | 65 nm |
| Operating Voltage (Core) | 0.9 V / 1.0 V / 1.1 V (programmable) | β |
| External Memory Interface | Up to 800 Mbps DDR3, QDR II+, RLDRAM II | β |
| Hard IP Blocks | PCIe Gen2, 10GbE MAC, memory controllers | β |
| RoHS Status | Compliant (Pb-free HBGA) | [DATA_NEEDED: RoHS status] |
| MSL Level | 3 (per JEDEC J-STD-020) | β |
| Mounting Type | Surface Mount (BGA) | Surface Mount (BGA) |
| Embedded Memory Bits | β | 16,672,768 |
| Number of User I/O | β | 976 |
| Core Voltage | β | 1.1 V |
| Maximum Operating Frequency | β | 450 MHz |
| Number of Transceivers | β | 16 |
| Transceiver Data Rate (Max) | β | 1.25 Gbps |
| Multiplier Blocks (18x18) | β | 384 |
| Total TriMatrix Memory | β | 15.04 Mbits (MLAB + M9K + M144K) |
| PLLs | β | 4 per quadrant + 8 fractional PLLs |
| Operating Temperature | β | 0C to +85C (commercial) |