EP3SL200H780I4N vs EP3SL200H780I4L Comparison
Detailed side-by-side comparison of EP3SL200H780I4N by Intel and EP3SL200H780I4L by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP3SL200H780I4N
EP3SL200H780I4N - Stratix III L FPGA 200K LE 780-HBGA | Intel
EP3SL200H780I4N β Last Time BuyIntel
EP3SL200H780I4L
EP3SL200H780I4L - 200K Logic Elements Stratix III L FPGA | Intel
EP3SL200H780I4L NrndSpecification Comparison
| Parameter | EP3SL200H780I4N | EP3SL200H780I4L |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $4,750.00 | $1,395.00 |
| Series | Stratix III L | β |
| Family | Stratix III (Logic-rich variant) | Stratix III L |
| Logic Elements | 200,000 | 200,000 |
| Logic Array Blocks (LABs) | 8,000 | 8,000 |
| Embedded Memory (bits) | 10,901,504 | β |
| User I/Os | 488 | β |
| Core Voltage | 1.1 V (0.86 V to 1.15 V range) | β |
| Process Technology | 65 nm CMOS | 65 nm CMOS |
| Fabric Frequency (typical) | 450 MHz | β |
| Speed Grade | I4 | I4 (Industrial) |
| Operating Temperature Range | -40C to +100C (industrial) | β |
| Package | 780-ball FCBGA (Flip-Chip BGA, FineLine) | 780-pin FC-HFBGA (Flip-Chip) |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| Lead-Free | Yes (suffix N) | β |
| RoHS Status | Compliant | Compliant |
| Embedded Memory (Bits) | β | 10,901,504 |
| Maximum User I/O | β | 488 |
| Core Supply Voltage | β | 0.86 V to 1.15 V |
| Internal Performance | β | 375 MHz |
| Operating Temperature | β | -40C to +100C (Industrial) |
| Transceivers | β | Up to 24 channels |
| Transceiver Data Rate | β | Up to 6.375 Gbps |
| DSP Blocks | β | 9x9 / 18x18 / 36x36 multipliers |
| Memory Interface Support | β | DDR3, DDR2, DDR, QDR II+, RLDRAM II |
| JTAG Support | β | IEEE Std 1149.1 Boundary-Scan |
| HardCopy Support | β | Compatible (Lattice-style migration path via HardCopy III) |