EP610DC-10 vs EP610DC-15 Comparison
Detailed side-by-side comparison of EP610DC-10 by Intel and EP610DC-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610DC-10 | EP610DC-15 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.95 | $7.95 |
| Device Family | Altera Classic EPLD | β |
| Macrocells | 16 | 16 |
| Maximum Pipelined Data Rate | 100 MHz | β |
| Pin-to-Pin Propagation Delay (tpd) | 10 ns | β |
| Speed Grade | -10 | β |
| Package | 24-pin CDIP (Ceramic DIP, windowed) | 24-pin Ceramic DIP (CDIP-24) with UV window |
| Mounting Type | Through-Hole | Through-Hole |
| Technology | CMOS, EPROM-based (UV-erasable) | CMOS |
| Supply Voltage | 5 V (single supply) | β |
| Operating Temperature | 0C to +70C (commercial) | 0C to 70C (commercial) |
| I/O Pins | [DATA_NEEDED: exact I/O count for CDIP-24 variant] | β |
| Logic Elements | 16 macrocells (programmable AND/OR array) | β |
| Configuration Memory | UV-erasable EPROM | β |
| Reprogrammable | Yes (UV erase window on package) | β |
| RoHS Status | [DATA_NEEDED: not stated in verified web data] | [DATA_NEEDED: RoHS status] |
| Product Family | β | Classic EPLD (EP610) |
| Architecture | β | UV-erasable CMOS PAL-type |
| Logic Expanders | β | 4 |
| Dedicated Inputs | β | 20 |
| Bidirectional I/O Pins | β | 16 |
| Total Product Terms | β | 160 |
| Propagation Delay (tPD) | β | 15 ns (speed grade -15) |
| Maximum Internal Clock Frequency | β | 71.4 MHz |
| Supply Voltage (VCC) | β | 4.75 V to 5.25 V |
| Programming Method | β | JEDEC fuse map, UV erasure |