EP610DC-20 vs EP610DC-10 Comparison
Detailed side-by-side comparison of EP610DC-20 by Intel and EP610DC-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610DC-20 | EP610DC-10 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $15.85 | $7.95 |
| Product Type | CMOS UV-Erasable Programmable Logic Device (EPLD) | β |
| Family | Classic EP610 | β |
| Logic Macrocells | 16 | β |
| Dedicated Inputs | 4 | β |
| I/O Pins | 16 (bidirectional) | [DATA_NEEDED: exact I/O count for CDIP-24 variant] |
| Total Usable Pins | 20 | β |
| Product Terms (p-terms) | 160 | β |
| Propagation Delay (tPD) | 22 ns | β |
| Maximum Toggle Frequency (fMAX) | 55.6 MHz | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | β |
| Operating Temperature | 0 Β°C to 70 Β°C (commercial) | 0C to +70C (commercial) |
| Package | 24-pin Ceramic DIP (CDIP-24) with UV window | 24-pin CDIP (Ceramic DIP, windowed) |
| Programming Method | UV erasure + parallel programmer | β |
| Process Technology | CMOS, UV-erasable floating gate | β |
| Mounting Type | Through-hole | Through-Hole |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: not stated in verified web data] |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Device Family | β | Altera Classic EPLD |
| Macrocells | β | 16 |
| Maximum Pipelined Data Rate | β | 100 MHz |
| Pin-to-Pin Propagation Delay (tpd) | β | 10 ns |
| Speed Grade | β | -10 |
| Technology | β | CMOS, EPROM-based (UV-erasable) |
| Supply Voltage | β | 5 V (single supply) |
| Logic Elements | β | 16 macrocells (programmable AND/OR array) |
| Configuration Memory | β | UV-erasable EPROM |
| Reprogrammable | β | Yes (UV erase window on package) |