EP610DC-25 vs EP610DI-30N Comparison
Detailed side-by-side comparison of EP610DC-25 by Rochester Electronics and EP610DI-30N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Rochester Electronics
EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester
EP610DC-25 β ActiveSpecification Comparison
| Parameter | EP610DC-25 | EP610DI-30N |
|---|---|---|
| Brand | Rochester Electronics | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.95 | $17.80 |
| Family | Altera Classic EPLD | Altera Classic EP610 |
| Product Type | EPLD (Erasable Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Macrocells | 16 | 16 |
| Equivalent Gates | 300 | β |
| Maximum Propagation Delay (tPD) | 25 ns | β |
| Pipelined Data Rate | Up to 100 MHz | β |
| Number of I/O Pins | 22 | β |
| Number of Dedicated Inputs | 4 | β |
| Total Pin Count | 24 | β |
| Package | 24-pin CDIP (Ceramic DIP, through-hole) | CDIP-24 (Ceramic DIP, windowed) |
| Mounting Type | Through Hole | Through-hole (DIP) |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V Β±5% |
| Operating Temperature | 0 C to +70 C | -40Β°C to +85Β°C (industrial) |
| Technology | CMOS EPROM (UV-erasable) | β |
| Programming Method | JEDEC fuse-map / UV-erase | UV-erasable (windowed ceramic) |
| Speed Grade Suffix | -25 (25 ns tPD) | β |
| Usable Gates | β | 300 |
| Propagation Delay (tPD) | β | 30 ns |
| Maximum Frequency | β | 33.3 MHz (system); 100 MHz (pipelined) |
| Pin Count | β | 24 |
| Process Technology | β | CMOS |
| MSL Level | β | [DATA_NEEDED: MSL level] |
| RoHS Status | β | [DATA_NEEDED: RoHS status] |