EP610DC-35 vs EP610DC-30 Comparison
Detailed side-by-side comparison of EP610DC-35 by Altera and EP610DC-30 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610DC-35 | EP610DC-30 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $18.40 | $10.40 |
| Device Type | CPLD - Classic EPLD | β |
| Family | Altera Classic EP610 | EP610 (Classic Device Family) |
| Macrocells | 16 | 16 |
| Usable Gates | 300 | 300 |
| Propagation Delay (tPD) | 35 ns | 30 ns |
| Maximum Frequency (fMAX) | 28.6 MHz | β |
| Pipelined Data Rate | up to 100 MHz | β |
| Supply Voltage (VCC) | 5 V | β |
| Process Technology | CMOS | β |
| Program/erase Method | UV-erasable (windowed CERDIP) | β |
| Package | 24-pin CDIP (windowed CERDIP) 0.300 inch | 24-pin CERDIP (windowed) |
| Mounting Type | Through-Hole (DIP) | Through-Hole |
| Operating Temperature | 0C to +70C (commercial) [DATA_NEEDED: explicit range from datasheet] | Commercial (0C to +70C) |
| Manufacturer | Originally Altera; today supplied via Rochester Electronics (authorized) | β |
| RoHS Status | [DATA_NEEDED: not explicitly confirmed in retrieved data; CERDIP packages typically non-RoHS] | β |
| Product Type | β | Classic EPLD (Erasable Programmable Logic Device) |
| Logic Expanders | β | 4 (4 product terms per macrocell) |
| Maximum Pipelined Clock Frequency | β | 100 MHz |
| Dedicated Inputs | β | 16 |
| I/O Pins | β | 16 (with output enable) |
| Speed Grade | β | -30 (30 ns tPD) |
| Technology | β | CMOS EPROM |
| Programmability | β | UV-erasable, windowed EPROM |
| Security Bit | β | Yes (protects design after programming) |
| Output Modes | β | Registered and Combinatorial |