EP610ILC-25 vs EP610JI-30 Comparison
Detailed side-by-side comparison of EP610ILC-25 by Altera and EP610JI-30 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610ILC-25 | EP610JI-30 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.85 | $9.40 |
| Family | Classic EPLD (EP610 series) | Altera Classic EPLD (EP610) |
| Device Type | EEPLD (Electrically Erasable PLD) | UV Erasable Programmable Logic Device (EPLD) |
| Usable Gates | 300 | β |
| Macrocells | 16 | 16 |
| Product Terms | 160 | 160 |
| Maximum Operating Frequency (fMAX) | 40 MHz | β |
| Pin-to-Pin Propagation Delay (tPD) | 25 ns | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | β |
| Nominal Supply Voltage | 5 V | β |
| Total Inputs | 20 | β |
| Dedicated Inputs | 4 | 4 |
| Bidirectional I/O Pins | 16 | β |
| Operating Temperature Range | 0 C to +70 C (commercial) | β |
| Package | 28-pin PLCC (J-lead) | CQCC28 (windowed ceramic JLCC, J-bend) |
| Mounting Type | Surface Mount | Surface Mount (JLCC) |
| Process Technology | CMOS, electrically erasable | CMOS |
| Programming Method | In-system, electrically erasable | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - vintage ceramic package, likely non-RoHS] |
| Propagation Delay (tpd) | β | 30 ns (max) |
| Pipelined Data Rate | β | Up to 100 MHz |
| I/O Pins | β | 16 |
| External Clocks | β | 2 |
| Supply Voltage | β | 5 V (single supply) |
| Package Code | β | JLCC-28 / CQCC28 |
| Erasure Method | β | Ultraviolet (UV) via top window |
| Programming | β | Altera Logic Programmer compatible |
| Operating Temperature | β | -40C to +85C (industrial, per EP610 family suffix convention) |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |