EP610JI-30 vs EP610ILC-10 Comparison

Detailed side-by-side comparison of EP610JI-30 by Altera and EP610ILC-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP610JI-30 EP610ILC-10
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $9.40 $7.20
Family Altera Classic EPLD (EP610) β€”
Device Type UV Erasable Programmable Logic Device (EPLD) β€”
Macrocells 16 16
Propagation Delay (tpd) 30 ns (max) β€”
Pipelined Data Rate Up to 100 MHz β€”
Product Terms 160 160
Dedicated Inputs 4 4
I/O Pins 16 16
External Clocks 2 β€”
Supply Voltage 5 V (single supply) 5 V (single supply)
Process Technology CMOS β€”
Package CQCC28 (windowed ceramic JLCC, J-bend) PLCC-28 (plastic J-lead chip carrier)
Package Code JLCC-28 / CQCC28 β€”
Erasure Method Ultraviolet (UV) via top window β€”
Programming Altera Logic Programmer compatible β€”
Operating Temperature -40C to +85C (industrial, per EP610 family suffix convention) [DATA_NEEDED: operating temperature range]
Mounting Type Surface Mount (JLCC) Surface Mount (PLCC socket or solder)
RoHS Status [DATA_NEEDED: RoHS status - vintage ceramic package, likely non-RoHS] [DATA_NEEDED: RoHS compliance]
Lead-Free [DATA_NEEDED: lead-free status] β€”
Device Family β€” Classic EPLD
Product Type β€” UV-Erasable / OTP PLD
Architecture β€” PAL-type with macrocells
Usable Gates β€” 300
Pin-to-Pin Delay (tPD) β€” 10 ns (grade -10)
Counter Frequency (fCNT) β€” 100 MHz
Logic Family Compatibility β€” TTL (5 V CMOS/TTL-compatible I/O)

Datasheets & Resources

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