EP610JI-30 vs EP610ILC-25 Comparison
Detailed side-by-side comparison of EP610JI-30 by Altera and EP610ILC-25 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610JI-30 | EP610ILC-25 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.40 | $9.85 |
| Family | Altera Classic EPLD (EP610) | Classic EPLD (EP610 series) |
| Device Type | UV Erasable Programmable Logic Device (EPLD) | EEPLD (Electrically Erasable PLD) |
| Macrocells | 16 | 16 |
| Propagation Delay (tpd) | 30 ns (max) | β |
| Pipelined Data Rate | Up to 100 MHz | β |
| Product Terms | 160 | 160 |
| Dedicated Inputs | 4 | 4 |
| I/O Pins | 16 | β |
| External Clocks | 2 | β |
| Supply Voltage | 5 V (single supply) | β |
| Process Technology | CMOS | CMOS, electrically erasable |
| Package | CQCC28 (windowed ceramic JLCC, J-bend) | 28-pin PLCC (J-lead) |
| Package Code | JLCC-28 / CQCC28 | β |
| Erasure Method | Ultraviolet (UV) via top window | β |
| Programming | Altera Logic Programmer compatible | β |
| Operating Temperature | -40C to +85C (industrial, per EP610 family suffix convention) | β |
| Mounting Type | Surface Mount (JLCC) | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status - vintage ceramic package, likely non-RoHS] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Usable Gates | β | 300 |
| Maximum Operating Frequency (fMAX) | β | 40 MHz |
| Pin-to-Pin Propagation Delay (tPD) | β | 25 ns |
| Supply Voltage (VCC) | β | 4.75 V to 5.25 V |
| Nominal Supply Voltage | β | 5 V |
| Total Inputs | β | 20 |
| Bidirectional I/O Pins | β | 16 |
| Operating Temperature Range | β | 0 C to +70 C (commercial) |
| Programming Method | β | In-system, electrically erasable |