EP610LC-15 vs EP610LC-30 Comparison

Detailed side-by-side comparison of EP610LC-15 by Altera and EP610LC-30 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP610LC-15 EP610LC-30
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $4.65 $16.40
Product Type Classic EPLD (Erasable Programmable Logic Device) β€”
Family Altera Classic EPLD (EP610) Classic EPLD (EP610)
Logic Elements / Macrocells 16 macrocells β€”
Equivalent Gates 300 gates β€”
Propagation Delay (tpd) 15 ns β€”
Counter Frequency (fmax) 83.3 MHz β€”
Pipelined Data Rate up to 100 MHz up to 100 MHz
Supply Voltage (Vcc) 5 V (single supply) β€”
Process Technology CMOS β€”
Package 28-pin PLCC (J-lead, plastic OTP) 24-pin CERDIP / PDIP
Mounting Type Surface Mount Through-Hole
Number of Pins 28 β€”
Operating Temperature 0C to +70C (commercial) [DATA_NEEDED: full temperature grade] 0 C to +70 C (commercial) / -55 C to +125 C (military)
Programming OTP (one-time programmable) β€”
RoHS Status unknown [DATA_NEEDED: RoHS status]
MSL Level [DATA_NEEDED: MSL rating] β€”
Macro Cells β€” 16
Logic Gates β€” Equivalent to 300 gates (typical)
Pin-to-Pin Delay (tPD) β€” 30 ns
Supply Voltage (VCC) β€” 4.75 V to 5.25 V
Programming Voltage (VPP) β€” 13 V nominal
Technology β€” CMOS EPROM (UV-erasable)
Erase/Program Cycles β€” 1000 typical
Output Type β€” CMOS tri-state (programmable)
Logic Compatibility β€” TTL and CMOS
Turbo Mode β€” Yes (registered path bypass)

Datasheets & Resources

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