EP610LC-25 vs EP610ILC-10 Comparison
Detailed side-by-side comparison of EP610LC-25 by Intel and EP610ILC-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610LC-25 | EP610ILC-10 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $6.20 | $7.20 |
| Product Type | EPLD (Erasable Programmable Logic Device) | UV-Erasable / OTP PLD |
| Family | Classic EPLD | β |
| Macrocells | 16 | 16 |
| Logic Array Blocks (LABs) | 4 | β |
| Propagation Delay (tPD) | 25 ns | β |
| Maximum Toggle Frequency | 100 MHz | β |
| Pipelined Data Rate | Up to 100 MHz | β |
| Supply Voltage | 5 V Β±5% | 5 V (single supply) |
| Technology | CMOS | β |
| Programmability | UV-erasable (windowed package) | β |
| Package | PLCC-28 | PLCC-28 (plastic J-lead chip carrier) |
| Operating Temperature | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| Mounting Type | Surface Mount | Surface Mount (PLCC socket or solder) |
| I/O Pins | [DATA_NEEDED: exact I/O count] | 16 |
| RoHS Status | [DATA_NEEDED] | [DATA_NEEDED: RoHS compliance] |
| Device Family | β | Classic EPLD |
| Architecture | β | PAL-type with macrocells |
| Usable Gates | β | 300 |
| Product Terms | β | 160 |
| Dedicated Inputs | β | 4 |
| Pin-to-Pin Delay (tPD) | β | 10 ns (grade -10) |
| Counter Frequency (fCNT) | β | 100 MHz |
| Logic Family Compatibility | β | TTL (5 V CMOS/TTL-compatible I/O) |