EP610LI-35 vs EP610JI-30 Comparison

Detailed side-by-side comparison of EP610LI-35 by Altera and EP610JI-30 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP610LI-35 EP610JI-30
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $10.50 $9.40
Family Classic EPLD Altera Classic EPLD (EP610)
Series EP610 β€”
Number of Macrocells 16 β€”
Usable Gates 300 β€”
Number of I/O Pins 16 β€”
Total Inputs 20 β€”
Dedicated Inputs 4 4
External Clock Inputs 2 β€”
Product Terms 160 160
Maximum Propagation Delay 35 ns (tpd) β€”
Maximum Operating Frequency 28.6 MHz (fmax) β€”
Pipelined Data Rate Up to 100 MHz Up to 100 MHz
Supply Voltage 5 V 5 V (single supply)
Process Technology CMOS CMOS
Architecture PAL-type (AND-OR array) β€”
Package 28-pin PLCC (windowed ceramic, 'LI') CQCC28 (windowed ceramic JLCC, J-bend)
Operating Temperature Range [DATA_NEEDED: military/industrial operating temperature range] β€”
Programming Technology UV-erasable (EPROM) β€”
Mounting Type Surface Mount Surface Mount (JLCC)
RoHS Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status - vintage ceramic package, likely non-RoHS]
Device Type β€” UV Erasable Programmable Logic Device (EPLD)
Macrocells β€” 16
Propagation Delay (tpd) β€” 30 ns (max)
I/O Pins β€” 16
External Clocks β€” 2
Package Code β€” JLCC-28 / CQCC28
Erasure Method β€” Ultraviolet (UV) via top window
Programming β€” Altera Logic Programmer compatible
Operating Temperature β€” -40C to +85C (industrial, per EP610 family suffix convention)
Lead-Free β€” [DATA_NEEDED: lead-free status]

Datasheets & Resources

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