EP610PC-30 vs EP610DC-30 Comparison

Detailed side-by-side comparison of EP610PC-30 by Altera and EP610DC-30 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP610PC-30 EP610DC-30
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $27.74 $10.40
Device Family Classic EPLD (EP610) β€”
Macrocells 16 16
Usable Gates 300 300
Propagation Delay (tPD) 30 ns 30 ns
Maximum Pipeline Frequency 33.3 MHz (typical) / 100 MHz pipelined β€”
Supply Voltage (VCC) 5 V (4.75 V to 5.25 V) β€”
Process Technology CMOS EPROM β€”
Package 24-pin PDIP (0.300 inch) 24-pin CERDIP (windowed)
Mounting Type Through-Hole Through-Hole
Programmability One-Time Programmable (OTP, no window on plastic PDIP) UV-erasable, windowed EPROM
Operating Temperature 0C to +70C (commercial) Commercial (0C to +70C)
Output Drive Current [DATA_NEEDED: IOH/IOL per datasheet DC characteristics] β€”
Input Pins (Dedicated) [DATA_NEEDED: dedicated input count from datasheet pinout] β€”
I/O Pins [DATA_NEEDED: bidirectional I/O count from datasheet pinout] 16 (with output enable)
Programming Tool Altera A+PLUS / MAX+PLUS II (legacy) β€”
RoHS Status Not applicable (legacy non-compliant package per distributor listing) β€”
Lead Free Status Not applicable β€”
Current Distributor Rochester Electronics, LLC (authorized continuing source) β€”
Product Type β€” Classic EPLD (Erasable Programmable Logic Device)
Family β€” EP610 (Classic Device Family)
Logic Expanders β€” 4 (4 product terms per macrocell)
Maximum Pipelined Clock Frequency β€” 100 MHz
Dedicated Inputs β€” 16
Speed Grade β€” -30 (30 ns tPD)
Technology β€” CMOS EPROM
Security Bit β€” Yes (protects design after programming)
Output Modes β€” Registered and Combinatorial

Datasheets & Resources

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