EP610PC30 vs EP610PC-25 Comparison
Detailed side-by-side comparison of EP610PC30 by Altera and EP610PC-25 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610PC30 | EP610PC-25 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $42.00 | $9.75 |
| Device Type | EPLD (Erasable Programmable Logic Device) | OT PLD, PAL-type, CMOS |
| Family | Classic EP610 | β |
| Macrocells | 16 | β |
| Usable Gates | 300 | 300 |
| Propagation Delay (tPD) | 30 ns | β |
| Maximum Toggle Frequency | 33.3 MHz | β |
| Pipelined Data Rate | Up to 100 MHz | β |
| Supply Voltage (VCC) | 5 V | β |
| Technology | CMOS | CMOS, EPROM (UV-erasable) |
| Package | PDIP-24 | PDIP-24 (0.3 inch, through-hole) |
| Mounting Type | Through-Hole | Through-Hole (DIP) |
| Programming | EPROM/EEPROM-based, MAX+plus II toolchain | β |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature grade] |
| RoHS Status | Not applicable (legacy through-hole, contains Pb per historical datasheet) | [DATA_NEEDED: RoHS status] |
| Logic Capacity | 16 macrocells / 300 gates equivalent | β |
| Configuration Memory | Non-volatile (UV-erasable or OTP variant) | β |
| Manufacturer (Original) | Altera Corporation (now Intel FPGA) | β |
| Current Distributor | Rochester Electronics, LLC | β |
| Device Family | β | Classic EPLD (EP610 series) |
| Macro Cells | β | 16 |
| Propagation Delay (tpd) | β | 25 ns |
| Maximum Pipelined Data Rate | β | 100 MHz |
| Supply Voltage (Vcc) | β | 5 V (nominal) |
| Dedicated Inputs | β | 4 |
| I/O Pins | β | 20 (bidirectional, JTAG-programmable OE per macrocell) |
| Programming Method | β | EPROM (UV-erasable), via Altera programming hardware |