EP910DC-15 vs EP910ILI-25 Comparison

Detailed side-by-side comparison of EP910DC-15 by Altera and EP910ILI-25 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP910DC-15 EP910ILI-25
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $10.75 $7.25
Family Altera Classic EPLD β€”
Device Density 900 usable gates β€”
Macrocells 24 24
Logic Elements [DATA_NEEDED: exact LE count] β€”
Dedicated Inputs 12 12
Bidirectional I/O Pins 12 β€”
Flip-Flops 10 β€”
Product Terms per Macrocells 24 β€”
Maximum Propagation Delay (tPD) 15 ns β€”
Speed Grade 15 β€”
Supply Voltage (VCC) 5 V (typical) β€”
Operating Temperature 0C to +70C (commercial) -40C to +85C (Industrial)
Technology CMOS EPROM, UV-erasable CMOS, EPROM
Package 24-pin ceramic DIP (DC) PLCC-44 (windowed ceramic, J-lead)
Mounting Type Through-Hole β€”
MSL Level [DATA_NEEDED: MSL level] β€”
RoHS Status [DATA_NEEDED: not explicitly stated in verified data] Non-compliant (windowed ceramic package)
Product Type β€” EPLD (Erasable Programmable Logic Device)
Series β€” EP910 (Classic EPLD)
I/O Pins β€” 24
Product Terms β€” 240 (maximum)
Propagation Delay (tPD) β€” 25 ns
Architecture β€” PAL-type with global interconnect bus
Operating Voltage β€” 5 V (4.75 V to 5.25 V)
Programming Method β€” UV-erasable (windowed), MAX+PLUS II programmer
Logic Test Circuitry β€” On-board JTAG-compatible test

Datasheets & Resources

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