EP910DC-35 vs EP910DI-30 Comparison
Detailed side-by-side comparison of EP910DC-35 by Altera and EP910DI-30 by Rochester Electronics. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP910DC-35
EP910DC-35 - 35ns 900-Gate CMOS UV PLD DIP-40 | Intel / Altera
EP910DC-35 ObsoleteRochester Electronics
EP910DI-30
EP910DI-30 - 24-Macrocell EPLD, 30ns, CDIP-40 | Altera (Rochester)
EP910DI-30 NrndSpecification Comparison
| Parameter | EP910DC-35 | EP910DI-30 |
|---|---|---|
| Brand | Altera | Rochester Electronics |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.95 | $17.60 |
| Device Type | UV-Erasable CMOS PLD (PAL-type) | β |
| Family | Classic EPLD EP910 | Classic EPLD (Altera EP910 series) |
| Architecture | PAL-type sum-of-products AND-OR array | β |
| Usable Gates | 900 gates | β |
| Macrocells | 24 | β |
| Product Terms | 240 | β |
| Dedicated Inputs | 12 | 10 |
| I/O Pins | 24 | β |
| Total Inputs | 36 | β |
| Propagation Delay (tpd) | 35 ns | 30 ns |
| Maximum Clock Frequency | 37 MHz (typical, internal) | β |
| Supply Voltage (Vcc) | 4.75 V to 5.25 V (5 V nominal) | β |
| Operating Temperature | 0 Β°C to +70 Β°C (commercial) | -40C to +85C (industrial) |
| Package | 40-pin CDIP (Ceramic DIP) with quartz window | CDIP-40 (ceramic DIP, 40-pin with UV window) |
| Lead Pitch | 2.540 mm | β |
| Termination Style | Through-Hole | β |
| Programming Method | JEDEC fuse map via device programmer; UV erase | β |
| Technology | CMOS, UV-erasable EPROM cell | CMOS, UV-erasable EPROM |
| RoHS Status | Non-compliant (ceramic DIP with Pb-bearing lead finish) | [DATA_NEEDED: RoHS compliance status] |
| Lifecycle | Obsolete / last-time-buy from authorized distributors | β |
| Product Type | β | UV-Erasable Programmable Logic Device (EPLD) |
| Macrocell Count | β | 24 |
| Maximum Toggle Frequency (fmax) | β | 62 MHz |
| Supply Voltage (VCC) | β | 5 V (single supply) |
| Mounting Type | β | Through-Hole (DIP) |
| Dedicated I/O Pins | β | 12 (12 input + 12 output) |
| Output Enable Pins | β | 2 |
| Pin Count | β | 40 |
| Programmable Logic Element | β | JEDEC fuse map (3rd-party programmer) |
| Manufacturer (Original) | β | Altera (now Intel PSG) |
| Current Distributor / Authorized Aftermarket | β | Rochester Electronics, LLC |