EP910DI-35 vs EP910DC-40 Comparison
Detailed side-by-side comparison of EP910DI-35 by Altera and EP910DC-40 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP910DI-35
EP910DI-35 - 24-Macrocell EPLD, 35ns, CDIP-40 | Altera/Rochester
EP910DI-35 β ActiveSpecification Comparison
| Parameter | EP910DI-35 | EP910DC-40 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $35.20 | $13.95 |
| Product Type | EPLD (Erasable Programmable Logic Device) | β |
| Family | Altera Classic EPLD | β |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | β |
| Propagation Delay (tPD) | 35 ns | β |
| Maximum Toggle Frequency (fCNT) | 28.6 MHz | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | β |
| Supply Current (ICC) | 40 mA typical | β |
| Dedicated Inputs | 10 | 12 |
| Bidirectional I/O Pins | 20 | 24 |
| Total Pins | 40 | β |
| Package | CDIP-40 (Ceramic DIP with UV window) | DIP-40 (ceramic, through-hole) |
| Mounting Type | Through-Hole | Through-Hole |
| Operating Temperature | -40C to +85C (industrial) | β |
| Technology | CMOS, UV-erasable EPROM | β |
| Programming Method | EPROM programmer + JEDEC fuse map | UV-erase + EPROM programmer; on-board logic test circuitry |
| Erasure Method | UV light through quartz window | β |
| RoHS Status | [DATA_NEEDED: RoHS status - ceramic CDIP legacy parts are typically non-compliant unless specified] | [DATA_NEEDED: rohs_status] |
| Logic Family | PAL-type AND/OR array with D flip-flops | β |
| Manufacturer | Original Altera; long-term authorized by Rochester Electronics, LLC | β |
| Device Family | β | Classic EPLD (EP910 series) |
| Architecture | β | PAL-type AND/OR, UV-erasable CMOS |
| Total Inputs to Logic Array | β | 36 |
| Product Terms | β | 240 maximum |
| Maximum Propagation Delay (tPD) | β | 40 ns |
| Maximum Operating Frequency (fMAX) | β | 25 MHz |
| Global Clocks | β | 2 |
| Supply Voltage | β | 5 V (typical for Classic EPLD family) |
| Operating Temperature (Commercial) | β | 0 Β°C to 70 Β°C |