EP910ILC-15N vs EP910ILC-15 Comparison
Detailed side-by-side comparison of EP910ILC-15N by Altera and EP910ILC-15 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP910ILC-15N - 450 Gate 24-Macrocell Classic CPLD, 15ns, 5V, 44-PLCC | Altera
EP910ILC-15N ObsoleteSpecification Comparison
| Parameter | EP910ILC-15N | EP910ILC-15 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.85 | $16.10 |
| Family | Classic | Classic EPLD |
| Product Type | CPLD (Complex Programmable Logic Device) | β |
| Logic Gates | 450 | 450 |
| Macro Cells | 24 | β |
| Maximum Propagation Delay (tPD) | 15 ns | β |
| Maximum Operating Frequency | 66.6 MHz | 83.33 MHz |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | β |
| User I/O Pins | 36 | 36 |
| Dedicated Input Pins | 16 | β |
| Package | PLCC-44 (J-lead, surface mount) | 44-pin PLCC (J-lead) |
| Mounting Type | Surface Mount | Surface Mount (SMT) |
| Operating Temperature | 0 C to +70 C (commercial) | -40C to +85C (industrial) |
| Process Technology | CMOS EPROM (one-time programmable) | β |
| JTAG Support | IEEE 1149.1 boundary-scan | β |
| RoHS Status | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Programming | EPROM / JTAG (Classic EP-series) | β |
| Series | β | EP910 |
| Macrocells | β | 24 |
| Propagation Delay (tPD) | β | 15 ns |
| Supply Voltage | β | 5 V |
| Memory Type | β | EPROM (UV-erasable) |
| Propagation Class | β | -15 speed grade |
| Storage Condition | β | Dry cabinet, humidity-controlled |