EP910ILI-25 vs EP910ILC-12 Comparison
Detailed side-by-side comparison of EP910ILI-25 by Altera and EP910ILC-12 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910ILI-25 | EP910ILC-12 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.25 | $12.40 |
| Product Type | EPLD (Erasable Programmable Logic Device) | Classic EPLD (Erasable Programmable Logic Device) |
| Series | EP910 (Classic EPLD) | β |
| Macrocells | 24 | β |
| Dedicated Inputs | 12 | β |
| I/O Pins | 24 | β |
| Product Terms | 240 (maximum) | β |
| Propagation Delay (tPD) | 25 ns | 12 ns (max) |
| Technology | CMOS, EPROM | β |
| Architecture | PAL-type with global interconnect bus | β |
| Package | PLCC-44 (windowed ceramic, J-lead) | 28-PLCC (J-Lead, 11.5 x 11.5 mm) |
| Operating Voltage | 5 V (4.75 V to 5.25 V) | β |
| Operating Temperature | -40C to +85C (Industrial) | -40 Β°C to +85 Β°C (industrial grade, 'I' suffix) |
| Programming Method | UV-erasable (windowed), MAX+PLUS II programmer | Altera programming algorithm (serial/parallel master-slave) |
| Logic Test Circuitry | On-board JTAG-compatible test | β |
| RoHS Status | Non-compliant (windowed ceramic package) | [DATA_NEEDED: RoHS status] |
| Family | β | Altera EP910 Classic EPLD |
| Number of Macrocells | β | 24 |
| Usable Gates | β | 450 (typical) |
| Supply Voltage (VCC) | β | 4.75 V to 5.25 V |
| Nominal Supply | β | 5 V |
| Memory Technology | β | UV-erasable CMOS EPROM |
| Mounting Type | β | Surface Mount |
| Configuration Storage | β | Non-volatile EPROM (instant-on) |
| MSL Level | β | [DATA_NEEDED: MSL level] |
| Number of Pins | β | 28 |
| Feedback Paths | β | 16 dedicated |