EP910ILI-25 vs EP910IPC-50 Comparison
Detailed side-by-side comparison of EP910ILI-25 by Altera and EP910IPC-50 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910ILI-25 | EP910IPC-50 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.25 | $13.85 |
| Product Type | EPLD (Erasable Programmable Logic Device) | Erasable Programmable Logic Device (EPLD) |
| Series | EP910 (Classic EPLD) | β |
| Macrocells | 24 | β |
| Dedicated Inputs | 12 | β |
| I/O Pins | 24 | β |
| Product Terms | 240 (maximum) | β |
| Propagation Delay (tPD) | 25 ns | 50 ns |
| Technology | CMOS, EPROM | CMOS EPROM cell |
| Architecture | PAL-type with global interconnect bus | β |
| Package | PLCC-44 (windowed ceramic, J-lead) | 40-pin Ceramic DIP (IPC, windowed) |
| Operating Voltage | 5 V (4.75 V to 5.25 V) | β |
| Operating Temperature | -40C to +85C (Industrial) | -40C to +85C (industrial) |
| Programming Method | UV-erasable (windowed), MAX+PLUS II programmer | Off-board EPROM programmer + UV erase |
| Logic Test Circuitry | On-board JTAG-compatible test | β |
| RoHS Status | Non-compliant (windowed ceramic package) | [DATA_NEEDED: not stated in verified data] |
| Family | β | Altera Classic EPLD |
| Logic Capacity | β | [DATA_NEEDED: macrocell count / equivalent gates] |
| Clock-to-Output (tCO) | β | 35 ns |
| Maximum Toggle Frequency | β | [DATA_NEEDED: fMAX] |
| User I/O Pins | β | 24 |
| Supply Voltage (VCC) | β | 4.75 V to 5.25 V (5 V nominal) |
| Erasure Method | β | UV light through ceramic window (IPC package) |
| Mounting Type | β | Through-Hole (DIP) |