EP910IPC-12 vs EP910LI-12 Comparison
Detailed side-by-side comparison of EP910IPC-12 by Altera and EP910LI-12 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910IPC-12 | EP910LI-12 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $14.20 | $15.95 |
| Family | Classic EPLD | β |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | 450 |
| Maximum Operating Frequency (fMAX) | 76.9 MHz | β |
| Pin-to-Pin Propagation Delay (tPD) | 12 ns | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 4.75 V to 5.25 V (5 V typical) |
| Dedicated Inputs | 10 | β |
| I/O Pins | 24 | 24 |
| Package | 40-pin PDIP | 28-PLCC (windowed ceramic, J-Lead) |
| Mounting Type | Through Hole | β |
| Technology | CMOS EPLD (UV-erasable or OTP) | β |
| Operating Temperature | -40C to +85C (industrial) | -40C to +85C (industrial) |
| Programming Toolchain | MAX+PLUS II | β |
| Logic Capacity | Equivalent to ~24 PAL16V8s | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | non_compliant (ceramic windowed package) |
| Device Family | β | Altera Classic EPLD |
| Propagation Delay (tPD) | β | 12 ns |
| Maximum Frequency (fMAX) | β | 76.9 MHz |
| Inputs (with input registers) | β | 36 |
| Process Technology | β | 1.0-micron CMOS EPROM |
| Power Dissipation (typical) | β | 200 mW at 5 V |
| Programming Method | β | UV-erasable via windowed package |
| Logic Compatibility | β | TTL-compatible I/O |