EP910IPC-25 vs EP910LC-30Y Comparison
Detailed side-by-side comparison of EP910IPC-25 by Intel and EP910LC-30Y by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910IPC-25 | EP910LC-30Y |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.40 | $25.40 |
| Family | Classic EPLD (EP910 series) | Altera Classic EPLD |
| Manufacturer | Altera (now Intel) | β |
| Architecture | PAL-type EPLD, CMOS, UV/OTP | β |
| Usable Gates | 450 | 450 |
| Macrocells | 24 | 24 |
| Product Terms | 240 | β |
| Propagation Delay (tPD) | 25 ns | β |
| Maximum Frequency (fMAX) | 40 MHz | β |
| Dedicated Inputs | 12 | β |
| Bidirectional I/O Lines | 24 | β |
| Total Inputs (max) | 36 | β |
| Total Outputs (max) | 24 | β |
| Supply Voltage (VCC) | 5 V | β |
| Operating Temperature | 0C to +70C (commercial grade) | Commercial 0C to +70C |
| Package | 40-pin PDIP (PDIP-40) | PLCC-44 |
| Mounting Type | Through-Hole | Surface Mount (PLCC socket) |
| Programming Method | EPROM cell (OTP / UV erasable) | β |
| Development Tool | MAX+PLUS II | β |
| Device Type | β | EPLD (Erasable Programmable Logic Device) |
| Pin-to-Pin Delay (tPD) | β | 30 ns |
| Counter Frequency (fMAX) | β | 100 MHz (family maximum) |
| Supply Voltage | β | 5 V (TTL-compatible) |
| Process Technology | β | CMOS, UV-erasable / OTP |
| Speed/Power Grade | β | LC (low-power, 30ns) |
| Processing Flow | β | Y (extended reliability) |
| Logic Compatibility | β | 100% TTL emulation |
| RoHS Status | β | [DATA_NEEDED: RoHS status not specified in retrieved data] |