EP910LC-25 vs EP910LC-35 Comparison

Detailed side-by-side comparison of EP910LC-25 by Intel and EP910LC-35 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EP910LC-25

EP910LC-25 - 24 Macrocells Classic EPLD | Intel | 25ns

EP910LC-25 Obsolete
Altera
EP910LC-35

EP910LC-35 - 24 Macrocell Classic EPLD, 35ns | Intel/Altera

EP910LC-35 Obsolete

Specification Comparison

Parameter EP910LC-25 EP910LC-35
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $2.20 $18.75
Family Altera Classic EPLD Classic (EP910)
Macrocells 24 24
Logic Gates [DATA_NEEDED: logic gate count] β€”
Propagation Delay (tPD) 25 ns 35 ns
Dedicated Inputs 16 β€”
Package 28-pin PLCC (LC suffix) PLCC-44 (J-lead, LC suffix)
Mounting Type Surface Mount β€”
Technology CMOS (EPROM-based) CMOS EPROM
Operating Voltage [DATA_NEEDED: VCC range] β€”
Operating Temperature 0C to +70C (commercial) 0C to +70C (commercial)
Programmable Yes (EPROM, UV-erasable on windowed variants) β€”
I/O Pins [DATA_NEEDED: I/O count] β€”
RoHS Status [DATA_NEEDED: RoHS status] Not applicable (legacy product)
Lead-Free [DATA_NEEDED: lead-free status] β€”
Maximum Frequency [DATA_NEEDED: fMAX] β€”
Product Type β€” EPLD (Erasable Programmable Logic Device)
Usable Gates β€” 450
Maximum Toggle Frequency β€” 28.6 MHz
Supply Voltage (VCC) β€” 5 V
Pin Count β€” 44
Programmable Flip-Flops β€” Yes (per macrocell)
Output Enable Control β€” Per macrocell
Erasure Method β€” UV (windowed) or OTP (plastic)

Datasheets & Resources

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