EP910LC-30 vs EP910LC-35 Comparison
Detailed side-by-side comparison of EP910LC-30 by Altera and EP910LC-35 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LC-30 | EP910LC-35 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $22.50 | $18.75 |
| Device Type | EPLD (Erasable Programmable Logic Device) | β |
| Macrocell Count | 24 | β |
| Propagation Delay (tPD) | 30 ns (max) | 35 ns |
| Maximum Toggle Frequency | 62 MHz | 28.6 MHz |
| Supply Voltage (VCC) | 5 V (nominal, TTL) | 5 V |
| Process Technology | CMOS (EPROM-based) | β |
| Package Type | PDIP-40 (Plastic DIP, through-hole) | β |
| Operating Temperature Grade | Commercial (0C to +70C) | β |
| I/O Pin Count | 24 | β |
| Dedicated Input Pins | 36 (including I/O) | β |
| Product Terms per Macrocell | Up to 16 | β |
| Programming Technology | UV-erasable EPROM cell | β |
| Development Tool | Altera MAX+PLUS II | β |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Not applicable (legacy product) |
| Product Type | β | EPLD (Erasable Programmable Logic Device) |
| Family | β | Classic (EP910) |
| Macrocells | β | 24 |
| Usable Gates | β | 450 |
| Technology | β | CMOS EPROM |
| Package | β | PLCC-44 (J-lead, LC suffix) |
| Operating Temperature | β | 0C to +70C (commercial) |
| Pin Count | β | 44 |
| Programmable Flip-Flops | β | Yes (per macrocell) |
| Output Enable Control | β | Per macrocell |
| Erasure Method | β | UV (windowed) or OTP (plastic) |