EP910LC-32 vs EP910LC-30 Comparison

Detailed side-by-side comparison of EP910LC-32 by Altera and EP910LC-30 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP910LC-32

EP910LC-32 - 24-Macrocell Classic EPLD, PLCC-32 | Altera

EP910LC-32 Obsolete
Altera
EP910LC-30

EP910LC-30 - 24-Macrocell EPLD, 30ns, CMOS PLD | Altera

EP910LC-30 Obsolete

Specification Comparison

Parameter EP910LC-32 EP910LC-30
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $9.85 $22.50
Device Family Altera Classic EPLD β€”
Number of Macrocells 24 β€”
Number of Usable Gates 900 gates (typical) β€”
Number of Dedicated Inputs 10 β€”
Number of I/O Pins 20 β€”
Package PLCC-32 β€”
Speed Grade -32 β€”
Maximum Toggle Frequency (fMAX) [DATA_NEEDED: fMAX value in MHz for -32 grade] β€”
Pin-to-Pin Propagation Delay (tPD) [DATA_NEEDED: tPD in ns for -32 grade] β€”
Supply Voltage (VCC) 5 V 5 V (nominal, TTL)
Logic Family Low-power CMOS (LC suffix) β€”
Programming Method UV-erasable or one-time programmable (OTP for LC windowless variant) β€”
Operating Temperature Range [DATA_NEEDED: commercial or industrial grade] β€”
I/O Standard TTL-compatible β€”
Mounting Type Surface Mount (PLCC socket or direct solder) β€”
RoHS Status unknown [DATA_NEEDED: RoHS status]
MSL Level unknown [DATA_NEEDED: MSL level]
Device Type β€” EPLD (Erasable Programmable Logic Device)
Macrocell Count β€” 24
Propagation Delay (tPD) β€” 30 ns (max)
Maximum Toggle Frequency β€” 62 MHz
Process Technology β€” CMOS (EPROM-based)
Package Type β€” PDIP-40 (Plastic DIP, through-hole)
Operating Temperature Grade β€” Commercial (0C to +70C)
I/O Pin Count β€” 24
Dedicated Input Pins β€” 36 (including I/O)
Product Terms per Macrocell β€” Up to 16
Programming Technology β€” UV-erasable EPROM cell
Development Tool β€” Altera MAX+PLUS II

Datasheets & Resources

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