EP910LC-32 vs EP910LC-30Y Comparison

Detailed side-by-side comparison of EP910LC-32 by Altera and EP910LC-30Y by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP910LC-32 EP910LC-30Y
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $9.85 $25.40
Device Family Altera Classic EPLD β€”
Number of Macrocells 24 β€”
Number of Usable Gates 900 gates (typical) β€”
Number of Dedicated Inputs 10 β€”
Number of I/O Pins 20 β€”
Package PLCC-32 PLCC-44
Speed Grade -32 β€”
Maximum Toggle Frequency (fMAX) [DATA_NEEDED: fMAX value in MHz for -32 grade] β€”
Pin-to-Pin Propagation Delay (tPD) [DATA_NEEDED: tPD in ns for -32 grade] β€”
Supply Voltage (VCC) 5 V β€”
Logic Family Low-power CMOS (LC suffix) β€”
Programming Method UV-erasable or one-time programmable (OTP for LC windowless variant) β€”
Operating Temperature Range [DATA_NEEDED: commercial or industrial grade] β€”
I/O Standard TTL-compatible β€”
Mounting Type Surface Mount (PLCC socket or direct solder) Surface Mount (PLCC socket)
RoHS Status unknown [DATA_NEEDED: RoHS status not specified in retrieved data]
MSL Level unknown β€”
Family β€” Altera Classic EPLD
Device Type β€” EPLD (Erasable Programmable Logic Device)
Macrocells β€” 24
Usable Gates β€” 450
Pin-to-Pin Delay (tPD) β€” 30 ns
Counter Frequency (fMAX) β€” 100 MHz (family maximum)
Supply Voltage β€” 5 V (TTL-compatible)
Process Technology β€” CMOS, UV-erasable / OTP
Operating Temperature β€” Commercial 0C to +70C
Speed/Power Grade β€” LC (low-power, 30ns)
Processing Flow β€” Y (extended reliability)
Logic Compatibility β€” 100% TTL emulation

Datasheets & Resources

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