EP910LC-35 vs EP610LI-35 Comparison
Detailed side-by-side comparison of EP910LC-35 by Altera and EP610LI-35 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LC-35 | EP610LI-35 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $18.75 | $10.50 |
| Product Type | EPLD (Erasable Programmable Logic Device) | β |
| Family | Classic (EP910) | Classic EPLD |
| Macrocells | 24 | β |
| Usable Gates | 450 | 300 |
| Propagation Delay (tPD) | 35 ns | β |
| Maximum Toggle Frequency | 28.6 MHz | β |
| Supply Voltage (VCC) | 5 V | β |
| Technology | CMOS EPROM | β |
| Package | PLCC-44 (J-lead, LC suffix) | 28-pin PLCC (windowed ceramic, 'LI') |
| Operating Temperature | 0C to +70C (commercial) | β |
| Pin Count | 44 | β |
| Programmable Flip-Flops | Yes (per macrocell) | β |
| Output Enable Control | Per macrocell | β |
| Erasure Method | UV (windowed) or OTP (plastic) | β |
| RoHS Status | Not applicable (legacy product) | [DATA_NEEDED: RoHS compliance status] |
| Series | β | EP610 |
| Number of Macrocells | β | 16 |
| Number of I/O Pins | β | 16 |
| Total Inputs | β | 20 |
| Dedicated Inputs | β | 4 |
| External Clock Inputs | β | 2 |
| Product Terms | β | 160 |
| Maximum Propagation Delay | β | 35 ns (tpd) |
| Maximum Operating Frequency | β | 28.6 MHz (fmax) |
| Pipelined Data Rate | β | Up to 100 MHz |
| Supply Voltage | β | 5 V |
| Process Technology | β | CMOS |
| Architecture | β | PAL-type (AND-OR array) |
| Operating Temperature Range | β | [DATA_NEEDED: military/industrial operating temperature range] |
| Programming Technology | β | UV-erasable (EPROM) |
| Mounting Type | β | Surface Mount |