EP910LC44-35 vs EP910LC-35T Comparison
Detailed side-by-side comparison of EP910LC44-35 by Intel and EP910LC-35T by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LC44-35 | EP910LC-35T |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $19.95 | $28.90 |
| Family | Classic EPLD (OT sub-family) | Classic EPLD (EP910) |
| Architecture | PAL-type AND/OR array | β |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | β |
| Propagation Delay (tPD) | 35 ns (max) | 35 ns |
| Maximum Frequency (fMAX) | 28.6 MHz | β |
| Total Inputs | 36 | β |
| I/O Pins | 24 | β |
| Global Clocks | 2 | β |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Package | 44-pin PLCC (J-leaded) | PLCC-44 (J-lead) |
| Mounting Type | Surface Mount | Surface Mount (PLCC socket or solder) |
| Process Technology | CMOS | CMOS (EPROM-based) |
| Programmability | UV-erasable (windowed ceramic) | β |
| Logic Capacity | β | 450 usable gates |
| Maximum Operating Frequency | β | 28.6 MHz |
| User I/O Pins | β | 36 |
| Erasure Method | β | UV-erasable window (ceramic package) / OTP (plastic) |
| Programming | β | Altera programming hardware + MAX+PLUS II |
| MSL Level | β | MSL 3 (168 hours) |
| RoHS Status | β | [DATA_NEEDED: RoHS status not in verified data] |