EP910LC44-35 vs EP910LC44-40 Comparison
Detailed side-by-side comparison of EP910LC44-35 by Intel and EP910LC44-40 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LC44-35 | EP910LC44-40 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $19.95 | $9.75 |
| Family | Classic EPLD (OT sub-family) | Altera Classic EPLD |
| Architecture | PAL-type AND/OR array | β |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | β |
| Propagation Delay (tPD) | 35 ns (max) | 40 ns |
| Maximum Frequency (fMAX) | 28.6 MHz | β |
| Total Inputs | 36 | 36 |
| I/O Pins | 24 | 24 (bidirectional) |
| Global Clocks | 2 | β |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V (nominal) |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Package | 44-pin PLCC (J-leaded) | 44-pin PLCC (Plastic Leaded Chip Carrier) |
| Mounting Type | Surface Mount | Surface Mount |
| Process Technology | CMOS | β |
| Programmability | UV-erasable (windowed ceramic) | β |
| Product Terms (Total) | β | 240 |
| Dedicated Inputs | β | 12 |
| Global Clock Inputs | β | 2 |
| Technology | β | CMOS, UV-erasable EPROM |
| Logic Compatibility | β | TTL-compatible I/O |
| Programming Method | β | JEDEC file via LP6/MP9 or compatible programmer |
| RoHS Status | β | [DATA_NEEDED: RoHS compliance] |