EP910LI-15 vs EP910LI-50 Comparison
Detailed side-by-side comparison of EP910LI-15 by Altera and EP910LI-50 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LI-15 | EP910LI-50 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.70 | $65.00 |
| Product Type | Programmable Logic Device (PLD) | β |
| Device Family | Altera Classic EPLD | β |
| Part Number | EP910LI-15 | β |
| Supply Voltage Range | 4.5 V to 5.5 V | β |
| Dedicated Inputs | 12 | β |
| Input/Output Lines | 24 | β |
| Total User-Signal Resources | 36 | β |
| Speed Grade | 15 ns | β |
| Operating Temperature Range | -40 Β°C to +85 Β°C | β |
| Technology | CMOS | CMOS, UV-erasable EPROM |
| Package | 44-terminal J-lead ceramic chip carrier (PQCC44) | β |
| Package Pin Count | 44 terminals | 40 |
| Package Mounting | Surface Mount | β |
| Dielectric/Construction | Ceramic | β |
| RoHS Status | unknown | [DATA_NEEDED: RoHS status] |
| REACH Status | unknown | β |
| AEC-Q100 Status | not_applicable | β |
| Lead-Free Status | unknown | β |
| Halogen-Free Status | unknown | β |
| Conflict Minerals Status | unknown | β |
| Family | β | Altera Classic EPLD |
| Macrocells | β | 24 |
| Usable Gates | β | 450 |
| Propagation Delay (tPD) | β | 50 ns |
| Package Type | β | CERDIP-40 (L) |
| Supply Voltage (VCC) | β | 5 V +/- 10% |
| Operating Temperature | β | -40C to +85C (industrial) |
| Logic Blocks | β | Classic AND/OR array architecture |
| I/O Pins | β | [DATA_NEEDED: I/O pin count] |
| Programming Method | β | EPROM programmer (UV-erasable window) |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |
| Speed Grade Suffix | β | -50 (50 ns tPD) |