EP910LI-40T vs EP910LI-35T Comparison
Detailed side-by-side comparison of EP910LI-40T by Intel and EP910LI-35T by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LI-40T | EP910LI-35T |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.75 | $28.50 |
| Family | Classic EPLD | Classic EPLD (EP910) |
| Macrocells | 24 | β |
| Dedicated Inputs | 12 | β |
| I/O Pins | 24 | β |
| Maximum Inputs | 36 | β |
| Maximum Outputs | 24 | β |
| Product Terms | 240 | β |
| Propagation Delay (tPD) | 40 ns | 35 ns |
| Technology | CMOS, UV-erasable EPROM | CMOS, EPROM-based |
| Supply Voltage | 5 V (typical) | β |
| Operating Temperature | -40C to +85C (Industrial) | -40C to +85C (industrial, 'I' suffix) |
| Architecture | PAL-type with global bus | β |
| Package | Tape and Reel (suffix T); 40-pin DIP / 44-pin PLCC | 44-pin PLCC (JEDEC) |
| RoHS Status | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS compliance] |
| Programming Method | Altera Master Programming Unit (MPU), no JTAG | EPROM (UV-erasable for windowed versions) |
| Logic Elements | β | 24 macrocells |
| Usable Gates | β | 450 |
| Maximum Toggle Frequency (fMAX) | β | 28.6 MHz |
| Supply Voltage (VCC) | β | 5 V (4.75 V to 5.25 V) |
| Mounting Type | β | Surface Mount / Socket |
| Data Retention | β | [DATA_NEEDED: data retention years] |
| Number of I/O Pins | β | [DATA_NEEDED: I/O pin count] |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |