EP910PC-15 vs EP910PC-20 Comparison

Detailed side-by-side comparison of EP910PC-15 by Altera and EP910PC-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP910PC-15

EP910PC-15 - 900-Gate Classic EPLD, 15ns PDIP | Altera

EP910PC-15 Obsolete
Altera
EP910PC-20

EP910PC-20 - Classic EPLD, 900 Gates, 20ns DIP-24 | Altera

EP910PC-20 Obsolete

Specification Comparison

Parameter EP910PC-15 EP910PC-20
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $12.80 $12.40
Family Altera Classic EPLD Altera Classic EPLD
Usable Gates 900 900
Macrocells 24 β€”
Maximum Pin-to-Pin Delay (tpd) 15 ns β€”
Counter Frequency (fCNT) 100 MHz β€”
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) 5 V
Supply Current (Icc) 80 mA typical β€”
Dedicated Inputs 10 β€”
Dedicated I/O Pins 12 β€”
Operating Temperature 0C to +70C (commercial) 0C to +70C (commercial)
Package 24-pin PDIP (PDIP-24, 0.300 inch) PDIP-24 (PC suffix)
Mounting Type Through-Hole Through-Hole (DIP)
Process Technology CMOS, UV-erasable β€”
Programming Method Altera Logic Programmer card EPROM programmer, JEDEC fuse map
RoHS Status [DATA_NEEDED: RoHS status - EP910 is a legacy through-hole part, likely non-RoHS] [DATA_NEEDED: RoHS status]
MSL Level Not applicable (through-hole) [DATA_NEEDED: MSL level]
Device β€” EP910
Macrocell Count β€” [DATA_NEEDED: macrocell count]
Pin-to-Pin Delay (tPD) β€” 20 ns
Pin Count β€” 24
Technology β€” CMOS EPROM (UV-erasable)
I/O Compatibility β€” 100% TTL

Datasheets & Resources

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