EP910PC-20 vs EP910PC30T Comparison
Detailed side-by-side comparison of EP910PC-20 by Altera and EP910PC30T by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910PC-20 | EP910PC30T |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $12.40 | $8.85 |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Device | EP910 | β |
| Usable Gates | 900 | β |
| Macrocell Count | [DATA_NEEDED: macrocell count] | β |
| Pin-to-Pin Delay (tPD) | 20 ns | β |
| Package | PDIP-24 (PC suffix) | 24-pin PDIP (PC) |
| Pin Count | 24 | 24 |
| Supply Voltage (VCC) | 5 V | 5 V (4.75 V to 5.25 V) |
| Technology | CMOS EPROM (UV-erasable) | β |
| I/O Compatibility | 100% TTL | β |
| Operating Temperature | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| Programming Method | EPROM programmer, JEDEC fuse map | β |
| Mounting Type | Through-Hole (DIP) | Through-Hole (THT) |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Device Series | β | EP910 |
| Number of Macrocells | β | 24 |
| Number of I/O Pins | β | 24 |
| Number of Dedicated Inputs | β | 12 |
| Maximum Product Terms | β | 240 |
| Propagation Delay (tPD) | β | 30 ns |
| Maximum Clock Frequency (fMAX) | β | 33.3 MHz |
| Process Technology | β | CMOS |
| Programmable Logic Architecture | β | PAL-type sum-of-products, EPLD |
| Speed Grade | β | -30 (30 ns tPD) |
| Programming Technology | β | EPROM (OTP in plastic package, UV-erasable in windowed package) |