EP910PI-25 vs EP910PC-30 Comparison
Detailed side-by-side comparison of EP910PI-25 by Intel and EP910PC-30 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910PI-25 | EP910PC-30 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.95 | $6.50 |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Device | EP910 | β |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | β |
| I/O Pins | 24 | 12 bidirectional |
| Pin-to-Pin Propagation Delay (tPD) | 25 ns | 30 ns |
| Maximum Clock Frequency (fMAX) | 40 MHz | β |
| Supply Voltage (VCC) | 5 V nominal | 5 V Β±10% |
| Process Technology | 5 V CMOS (EPROM-based) | β |
| Package | PDIP-40 (Plastic DIP) | PDIP-40 (plastic DIP, 0.6 inch) |
| Pin Count | 40 | β |
| Mounting Type | Through-Hole | Through-hole DIP |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Programmability | UV-erasable (windowed) / one-time-programmable | β |
| RoHS Status | Non-compliant (PDIP package) | Non-compliant (contains lead, PDIP package) |
| Usable Gates | β | ~450 |
| Maximum Counter Frequency (fCNT) | β | 33.3 MHz |
| Logic Inputs | β | 36 dedicated |
| Logic Array Blocks (LABs) | β | 4 |
| Programming Technology | β | UV-erasable EPROM cell |
| TTL Emulation | β | 100% TTL-compatible |
| Power Dissipation | β | [DATA_NEEDED: power dissipation mW] |