EP910PI-30T vs EP910PC-30 Comparison
Detailed side-by-side comparison of EP910PI-30T by Altera and EP910PC-30 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910PI-30T | EP910PC-30 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.95 | $6.50 |
| Product Type | EPLD (Erasable Programmable Logic Device) | β |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Macrocells | 24 | 24 |
| Usable Gates | 480 | ~450 |
| Dedicated Inputs | 10 | β |
| Propagation Delay (tPD) | 30 ns | β |
| Register (Clock-to-Output) Delay | 20 ns | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V Β±10% |
| Technology | CMOS, UV-erasable (windowed ceramic) | β |
| Package Type | 40-pin PDIP (ceramic windowed) | β |
| Mounting Type | Through-Hole | Through-hole DIP |
| Operating Temperature | -40 C to +85 C (industrial) | 0C to +70C (commercial) |
| Programming | Altera Classic device programmer / MAX+PLUS II flow | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Non-compliant (contains lead, PDIP package) |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Pin-to-Pin Propagation Delay (tPD) | β | 30 ns |
| Maximum Counter Frequency (fCNT) | β | 33.3 MHz |
| Logic Inputs | β | 36 dedicated |
| I/O Pins | β | 12 bidirectional |
| Logic Array Blocks (LABs) | β | 4 |
| Package | β | PDIP-40 (plastic DIP, 0.6 inch) |
| Programming Technology | β | UV-erasable EPROM cell |
| TTL Emulation | β | 100% TTL-compatible |
| Power Dissipation | β | [DATA_NEEDED: power dissipation mW] |