EP910PI-30T vs EP910PI-40 Comparison
Detailed side-by-side comparison of EP910PI-30T by Altera and EP910PI-40 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910PI-30T | EP910PI-40 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.95 | $9.85 |
| Product Type | EPLD (Erasable Programmable Logic Device) | β |
| Family | Altera Classic EPLD | β |
| Macrocells | 24 | β |
| Usable Gates | 480 | β |
| Dedicated Inputs | 10 | β |
| Propagation Delay (tPD) | 30 ns | 43 ns |
| Register (Clock-to-Output) Delay | 20 ns | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 4.75 V to 5.25 V (5 V nominal) |
| Technology | CMOS, UV-erasable (windowed ceramic) | β |
| Package Type | 40-pin PDIP (ceramic windowed) | β |
| Mounting Type | Through-Hole | Through-Hole |
| Operating Temperature | -40 C to +85 C (industrial) | 0C to +70C (commercial) |
| Programming | Altera Classic device programmer / MAX+PLUS II flow | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Device Family | β | Classic EPLD |
| Part Number | β | EP910PI-40 |
| Architecture | β | PAL-type macrocell, CMOS, UV-erasable |
| Number of Macrocells | β | 24 |
| Number of Dedicated Inputs | β | 12 |
| Number of I/O Lines | β | 24 |
| External Clock Inputs | β | 2 |
| Maximum Clock Frequency | β | 25 MHz |
| Speed Grade | β | -40 (43 ns) |
| Package | β | PDIP-40 (Plastic DIP, 40-pin) |
| Process Technology | β | CMOS (UV-erasable) |
| Programming Method | β | UV-erase + Altera programmer (legacy) |
| Programmable Polarity | β | Yes (user-configurable output) |
| Output Enable Control | β | Yes (per-pin three-state) |